{"id":63,"date":"2024-09-14T07:11:27","date_gmt":"2024-09-14T07:11:27","guid":{"rendered":"https:\/\/technicalley.com\/central\/ee\/?p=63"},"modified":"2024-09-14T07:11:27","modified_gmt":"2024-09-14T07:11:27","slug":"systemverilog-source-order-execution","status":"publish","type":"post","link":"https:\/\/technicalley.com\/central\/ee\/2024\/09\/14\/systemverilog-source-order-execution\/","title":{"rendered":"SystemVerilog: Source Order Execution"},"content":{"rendered":"\n<p>Here is a rule in SystemVerilog (SV) LRM that specifies how non-blocking statements in a begin-end block are executed. Consider the example shown below.<\/p>\n\n\n\n<pre class=\"wp-block-code\"><code>logic &#91;3:0] y;\nalways @(posedge clock) begin\n    if (reset) begin \n        y &lt;= 4'd0;\n     end else begin\n         y &lt;= 4'd1;  \/\/ line A\n         y &lt;= 4'd2;  \/\/ line B\n         y &lt;= 4'd3;  \/\/ line C\n     end\nend<\/code><\/pre>\n\n\n\n<p>It would appear that there are three conflicting assignments to &#8216;y&#8217; on lines A, B and C. The SV LRM clearly defines the effect of these three assignments, with the &#8220;source order&#8221; rule: The last assignment on line C will override the earlier ones, and hence &#8216;y&#8217; will be assigned the value 4&#8217;d3.<\/p>\n\n\n\n<p>From the SV LRM:<\/p>\n\n\n\n<blockquote class=\"wp-block-quote is-layout-flow wp-block-quote-is-layout-flow\">\n<p>Statements within a begin-end block shall be executed in the order in which they appear in that begin-end block.<\/p>\n<\/blockquote>\n\n\n\n<p>This applies to both blocking and non-blocking assignments in a sequential block. The following example shows how this rule is useful to initialize variables.<\/p>\n\n\n\n<pre class=\"wp-block-code\"><code>logic error;\nalways @(posedge clock) begin\n    if (reset) begin\n        state &lt;= RX;\n        error &lt;= 1'b0;  \/\/ clear at reset\n    end else begin\n        error &lt;= 1'b0;  \/\/ clear error at the beginning of cycle\n        case (state)\n             RX: begin\n                 if (rx_error) begin\n                     error &lt;= 1'b1;  \/\/ set error\n                  end else begin\n                     \/\/ RX logic code\n                     state &lt;= TX;\n                  end\n              end\n              TX: begin\n                  if (tx_error) begin\n                      error &lt;= 1'b1;  \/\/ set error\n                   end else begin\n                        \/\/ Rx logic code\n                        state &lt;= RX;\n                   end\n              end\n           endcase\n    end\nend<\/code><\/pre>\n","protected":false},"excerpt":{"rendered":"<p>Here is a rule in SystemVerilog (SV) LRM that specifies how non-blocking statements in a begin-end block are executed. Consider the example shown below. It&#8230;<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[9,10],"tags":[18,19],"class_list":["post-63","post","type-post","status-publish","format-standard","hentry","category-systemverilog","category-verilog","tag-systemverilog","tag-verilog","wpcat-9-id","wpcat-10-id"],"jetpack_featured_media_url":"","_links":{"self":[{"href":"https:\/\/technicalley.com\/central\/ee\/wp-json\/wp\/v2\/posts\/63","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/technicalley.com\/central\/ee\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/technicalley.com\/central\/ee\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/technicalley.com\/central\/ee\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/technicalley.com\/central\/ee\/wp-json\/wp\/v2\/comments?post=63"}],"version-history":[{"count":0,"href":"https:\/\/technicalley.com\/central\/ee\/wp-json\/wp\/v2\/posts\/63\/revisions"}],"wp:attachment":[{"href":"https:\/\/technicalley.com\/central\/ee\/wp-json\/wp\/v2\/media?parent=63"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/technicalley.com\/central\/ee\/wp-json\/wp\/v2\/categories?post=63"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/technicalley.com\/central\/ee\/wp-json\/wp\/v2\/tags?post=63"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}