Author: editor
Design-Reuse, Portable Design, Retargetable Design, IP
Design reuse is not a new concept. This is something…
Verilog::Preproc – The Handy Verilog Preprocessor
I have been developing some tools at work to generated…
Posted in EE-General
EE and Hardware Design/Verification
Watch this site for discussion on EDA, system design, validation,…
