Category: EEDesign
The Red Herring in the Machine: How Expectations Can Sabotage System Testing
In my 18 years of blogging at The Technic Alley, I’ve shared countless technical fixes. But recently, while testing a new chip our team developed,…
LinkedIn: Moore’s Law Gets A Vitality Infusion
Synopsys Chairman and co-CEO Aart de Geus discusses how 3DIC technology is infusing vitality into Moore’s Law, driving innovation for the semiconductor industry.
Posted in EEDesign
Are FPGAs Ready To Tip ASICs?
This is a question that has been asked many times. A recent statement by Moshe Gavrielov, president and CEO of programmable logic supplier Xilinx Inc., that…
Posted in EDA
Why Would Synopsys Acquire Synplicity?
The recent announcement that Synopsys plans to acquire Synplicity has evoked a lot of reaction from the EE design community as expected. This is not…